Input bias current

The input bias current $I_B$ is the small DC current a real op-amp actually draws into each input terminal, violating golden rule 1 of the Ideal op-amp model (which says zero). The op-amp’s internal input transistors need some DC base or gate current to be biased; that current has to come in through the external circuit. Typical magnitudes: tens of nanoamperes for a bipolar 741, down to picoamperes for a FET-input device. It is one of the DC Real op-amp imperfections, alongside Input offset voltage.

Why a tiny current causes a DC error

A bias current is harmless until it flows through a resistance — then Ohm’s law turns it into a voltage. Each input current $I_B$ flows through the DC resistance seen looking out of that input (source resistance, feedback network) and drops $I_B\times R$ volts. That spurious DC voltage sits right at the input and is amplified by the Closed-loop gain just like a signal, producing an output DC error. For a 741 with $I_B=80\text{nA}$ flowing through a $1\text{M}\Omega$ source resistance, the error is $80\text{nA}\times 1\text{M}\Omega =80\text{mV}$ at the input — large.

The cancellation trick

The two input bias currents $I_{B+}$ and $I_{B-}$ are almost equal (same internal transistor pair). Exploit that: make the DC resistance seen from the non-inverting input equal to the DC resistance seen from the inverting input. Then the two nearly-equal bias currents drop nearly-equal voltages on the two inputs, so both inputs are pushed to the same DC level — and because the op-amp responds only to the difference, a common shift cancels. Concretely, for an inverting/non-inverting stage you add a resistor in series with the non-inverting input equal to $R_1\parallel R_2$ (the resistance the inverting node sees), instead of grounding it directly.

The cancellation is not perfect because $I_{B+}\ne I_{B-}$ exactly. What survives is set by the input offset current

$I_{OS}=|I_{B+}-I_{B-}|$

the difference of the two bias currents, which is typically an order of magnitude smaller than $I_B$ itself. So the matching trick replaces a $I_B\times R$ error with a much smaller $I_{OS}\times R$ error. For the lowest DC error overall, also choose small feedback resistances and, where the budget allows, a FET-input op-amp whose $I_B$ is picoamps to begin with.