A computer is byte-addressable when each memory address identifies one byte (8 bits). Multi-byte data — words, integers, instructions — occupy multiple consecutive byte addresses.
Almost all modern computers are byte-addressable. The alternative (word-addressable, where each address identifies a 32-bit or 64-bit word) was common in older mainframes and persists in some specialized systems, but byte-addressability is the default.
Why bytes
A byte is the natural unit for character data — ASCII characters fit in one byte. For a system that handles text, having direct addresses for each character is convenient.
For larger data types (int, float, pointer), the data occupies multiple consecutive byte addresses. A 32-bit word takes 4 byte addresses; a 64-bit double takes 8. The processor knows the size from the instruction:
ldw R2, A— load word (32 bits), reading addresses .ldb R2, A— load byte, reading just address .
Word addresses
A word is a fixed-size block of bytes. In a 32-bit machine, a word is 4 bytes. Word addresses are byte addresses where a word can naturally start: . See Word alignment for why this matters.
The processor’s PC increments by 4 between instructions in a 32-bit ISA, because each instruction is one word = four byte addresses wide.
For a 16-bit machine, words start at . For 64-bit, . Pattern: word addresses are multiples of the word size.
Multi-byte storage convention
Once a word occupies four consecutive bytes, you have to decide which byte (most significant, least significant, etc.) gets the lowest address. That’s endianness — see that note for the choices.
Either way, the address of the word is conventionally the address of its lowest byte. Pointing to a word means pointing to its first byte; the other three are implied.
Practical exam detail
A common confusion: the word address and the byte address of the word’s first byte are the same number. Don’t think of them as separate identifiers. A 32-bit word at “word address 4” lives at byte addresses , and the address is what you’d write in an assembly instruction.
Also: instructions in a fixed-length ISA always live at word-aligned addresses (). The two least-significant bits of an instruction address are always , which is sometimes exploited as free bits in branch encoding.