MOSFET DC analysis

MOSFET DC analysis is the procedure for finding a MOSFET circuit’s Operating point — its quiescent $I_D$, $V_{GS}$, and $V_{DS}$ — using the MOSFET large-signal model. Every small-signal/amplifier calculation assumes a known bias point, so this comes first.

The recipe

You have three relations to work with:

1. The overdrive definition: $V_{GS}=V_t+V_{OV}$.
2. The square-law: $I_D=\frac{1}{2}{k}_n{V}_{OV}^2=\frac{1}{2}{k}_n(V_{GS}-V_t{)}^2$.
3. KVL/KCL around the circuit.

Steps:

1. Assume saturation. It is the usual amplifier region and gives the simple square-law.
2. Write KVL through the gate–source loop. The gate draws no current (insulated by the Gate oxide), so no current flows in the gate path — this simplifies the loop equation a lot.
3. Combine KVL with the square-law. This gives a quadratic in $V_{GS}$ (or in $V_{OV}$). Solve it.
4. Pick the physical root: the one with $V_{GS}>V_t$ (equivalently $V_{OV}>0$). The other root is spurious.
5. Compute $I_D$, then $V_{DS}$ from the drain-loop KVL.
6. Check the assumption: is $V_{DS}\ge V_{OV}$? If yes, saturation holds and you are done. If $V_{DS}<V_{OV}$, the device is actually in the MOSFET triode region — discard, and redo using the triode equation $i_D=k_n[V_{OV}{V}_{DS}-V_{DS}^2/2]$.

Choose $R_D,R_S$ so $I_D$ is at a target with the device saturated.

Worked example

A MOSFET with $V_t=0.7\text{V}$ and $k_n=1{\text{mA/V}}^2$ has its gate held at $V_G=5\text{V}$ through a large resistor, a drain resistor $R_D$ to a $V_{DD}=10\text{V}$ supply, and a source resistor $R_S$ to ground. Take $R_S=3\text{k}\Omega$. Find $I_D$, $V_{GS}$, $V_{DS}$ and verify saturation. [Background from general knowledge, not the source PDF: the specific resistor values $R_S=3\text{k}\Omega$, $R_D=2\text{k}\Omega$ chosen below to make the example concrete; the PDF gives the method and $V_t$, $k_n$, $V_G$, $V_{DD}$ but leaves the resistor values to the figure.]

The gate current is zero, so no drop occurs in the gate path and $V_G$ appears directly at the gate. KVL gate → source → ground:

$V_G=V_{GS}+I_D{R}_S$

Substitute the square-law $I_D=\frac{1}{2}{k}_n(V_{GS}-V_t{)}^2$:

$5=V_{GS}+(3000)\cdot \frac{1}{2}(10^{-3})(V_{GS}-0.7{)}^2$

$5=V_{GS}+1.5(V_{GS}-0.7{)}^2$

Let $x=V_{GS}-0.7$ (so $V_{GS}=x+0.7$):

$5=x+0.7+1.5x^2\Rightarrow 1.5x^2+x-4.3=0$

$x=\frac{-1+\sqrt{1+4(1.5)(4.3)}}{2(1.5)}=\frac{-1+\sqrt{26.8}}{3}=\frac{-1+5.177}{3}\approx 1.39\text{V}$

(taking the positive root for $V_{GS}>V_t$). So $V_{OV}\approx 1.39\text{V}$, $V_{GS}\approx 2.09\text{V}$, and

$I_D=\frac{1}{2}(10^{-3})(1.39{)}^2\approx 0.97\text{mA}$

With $R_D=2\text{k}\Omega$:

$V_{DS}=V_{DD}-I_D(R_D+R_S)=10-(0.97\times 10^{-3})(2000+3000)\approx 10-4.83=5.17\text{V}$

Check: $V_{DS}=5.17\text{V}\ge V_{OV}=1.39\text{V}$ ✓ — saturation assumption holds, so the answer stands.

Solve $I_D,V_{GS},V_{DS}$ via KVL + square-law + saturation assumption; verify it holds.

The general drain-loop result used above is $V_{DS}=V_{DD}-I_D(R_D+R_S)$, and the gate-loop result $V_G=V_{GS}+I_D{R}_S$ is the basis of source-resistor MOSFET biasing: if $V_G\gg V_{GS}$ then $I_D\approx V_G/R_S$, almost independent of the wobbly transistor parameters.