Sign-and-magnitude representation

Sign-and-magnitude is the simplest way to represent signed binary numbers: the leftmost bit is the sign ( $0$ for positive, $1$ for negative), and the remaining bits hold the magnitude as an ordinary unsigned binary number.

In an $n$ -bit format, the sign occupies bit $b_{n - 1}$ and the magnitude occupies bits $b_{n - 2}$ through $b_{0}$ .

Examples in 4-bit form:

$+ 5 = 0101$ (sign $0$ , magnitude $101 = 5$ )
$- 5 = 1101$ (sign $1$ , magnitude $101 = 5$ )
$+ 0 = 0000$
$- 0 = 1000$

Issues

Sign-and-magnitude has three annoyances that make it the weakest of the standard signed representations:

Two zeros. $+ 0$ and $- 0$ are different bit patterns but represent the same value. That breaks “two numbers are equal iff their bits are equal” — you have to special-case zero.
Different addition logic for different sign combinations. To add a positive and negative number, you compare magnitudes, subtract the smaller from the larger, and copy the sign of the larger. The hardware can’t just blindly use one adder — it needs sign-aware logic.
One bit pattern is wasted. The range is symmetric around zero — sign-and-magnitude covers $- (2^{n - 1} - 1)$ to $+ (2^{n - 1} - 1)$ , which is what makes $\pm 0$ both representable. The downside is the wasted bit pattern: you only get $2^{n} - 1$ distinct values from $2^{n}$ patterns. This is the opposite tradeoff from 2’s complement, which is asymmetric (the $- 128$ slot has no positive counterpart in 8 bits) but representationally efficient.

Why it’s still studied

It’s intuitive — humans write " $- 5$ " by sticking a sign in front of the magnitude, and sign-and-magnitude does exactly that. It’s used in floating-point representations (the IEEE 754 sign bit is sign-and-magnitude on the mantissa), and in some signal-processing contexts where the symmetric range around zero matters.

For general integer arithmetic, signed numbers in 2’s complement are the standard, since they have a single zero and use the same adder hardware for any sign combination.

Range comparison with other schemes

For 8-bit numbers:

Representation	Range	Distinct values
Unsigned	$0$ to $255$	256
Sign-and-magnitude	$- 127$ to $+ 127$	255 (with $\pm 0$ )
1’s complement	$- 127$ to $+ 127$	255 (with $\pm 0$ )
2’s complement	$- 128$ to $+ 127$	256

Sign-and-magnitude is symmetric about zero (every positive value has its exact negative), at the cost of wasting one bit pattern on the alternate zero. 2’s complement wins on bit-pattern efficiency but is asymmetric around zero (the most-negative value has no positive counterpart).

Addition rules in detail

Adding two sign-and-magnitude numbers requires case analysis:

Case 1: same signs.

Both positive: add the magnitudes. Sign of result is positive.

Both negative: add the magnitudes. Sign of result is negative.

If the magnitude addition overflows the available bits, you have an overflow.

Case 2: different signs.

Subtract the smaller magnitude from the larger. Sign of result is the sign of the larger.

To do this in hardware: compare magnitudes, swap if needed, subtract, attach sign.

This is much messier than 2’s complement, where you just feed both bit patterns to an adder and discard the carry-out.

Where sign-and-magnitude actually appears

Despite being inferior for integer arithmetic, IEEE 754 floating-point as a whole is sign-magnitude: a single sign bit governs the entire numeric value, and the remaining bits encode the magnitude (as a biased exponent and an unsigned mantissa). The mantissa itself is unsigned magnitude, not “sign and magnitude” — there’s no second sign bit hiding inside it.

IEEE 754 single-precision (32-bit float): 1 sign bit + 8 exponent bits + 23 mantissa bits.
IEEE 754 double-precision (64-bit float): 1 + 11 + 52, same structure.
IEEE 754 half-precision (16-bit float): 1 + 5 + 10.

The IEEE choice of sign-magnitude at the whole-number level makes the symmetric range around zero natural, supports $- 0$ as a valid value (useful for branch cuts in complex math), and makes magnitude comparison fast (compare the unsigned exponent+mantissa fields after handling the sign bit separately).

For integer arithmetic in CPUs, however, 2’s complement dominates universally. See 2’s Complement Arithmetic for why.

In digital signal processing

Some DSP contexts prefer sign-and-magnitude for signal samples: audio waves, sensor readings. Reasons:

Symmetry around zero matches signal semantics (zero crossing is a natural reference).
$- 0$ can be useful as a “no signal” sentinel.
Quantization error is symmetric around zero, which sign-and-magnitude preserves (2’s complement has slight asymmetry due to the $- 128$ bit pattern).

But even here, most modern DSP chips internally use 2’s complement and convert at I/O boundaries.

[Note: this specific claim is from general knowledge and hasn’t been independently verified.]

For the dominant alternative, see 2’s Complement Arithmetic. For the underlying signed integer concept, see Signed binary number.

Idriss Rami — Notes

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